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DPDK Summit 2026 has ended
12-13 May 2026 | Stockholm, Sweden
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Please note: This schedule is automatically displayed in Central European Time. To see the schedule in your preferred timezone, please select from the drop-down at the bottom of the menu to the right.

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Tuesday, May 12
 

09:25 CEST

DPDK and 802.11 - Robert McMahon, Umber Networks
Tuesday May 12, 2026 09:25 - 10:10 CEST
DPDK transformed wired networking by giving host software direct control over packet processing. This talk makes the case that the same approach should be applied to 802.11 wireless.

Wi-Fi’s real behavior—contention, TXOP scheduling, A-MPDU aggregation, rate adaptation, and retries—is hidden below the 802.3 interface inside firmware and hardware state machines. This prevents per-packet observability and programmable control.

We propose a Wi-Fi Poll Mode Driver model that operates natively on 802.11 frames, exposing aggregation and retry behavior as first-class metadata and accepting explicit transmission parameters (MCS/NSS/BW, TXOP limits, retry policy). With this interface, a DPDK application can coordinate microsecond-scale MAC scheduling with millisecond-scale ECN/AQM control.

We outline the required PMD interface, metadata surface, and driver hooks needed to bring software-defined control to wireless networking.

Slides: https://www.umbernetworks.com/DPDK_WiFi_Stockholm_Pres.html 
Acronyms: https://www.umbernetworks.com/dpdk_talk_acronyms.html

Speakers
avatar for ROBERT MCMAHON

ROBERT MCMAHON

Founder, Umber Networks
Bob McMahon is founder and CTO of Umber Networks, developing Fi-Wi, a software-defined Wi-Fi architecture that centralizes MAC scheduling using fiber-connected radio heads. He previously worked on Cisco Catalyst switching and Wi-Fi chipset testing at Broadcom. He maintains iperf2... Read More →
Tuesday May 12, 2026 09:25 - 10:10 CEST
Rum 17+18 - Floor 3
  Session Presentations

10:15 CEST

Applying Header–Data Split To Zero-Copy Data Transfer - Dapeng Sang & Wei Yan, ByteDance
Tuesday May 12, 2026 10:15 - 10:25 CEST
In this presentation, we will explore the application of header-data split in zero-copy mechanisms within a disaggregated userspace protocol stack to improve performance and multi-tenant memory safety. We focus on two key points:
1. Performance Optimization
a. Zero-Copy: Achieve zero-copy between the application and the NIC, reducing latency and saving CPU resources.
b. Cache Efficiency: By applying HDS, the userspace stack only loads the protocol headers, reducing cache pollution and making protocol parsing faster.
c. Cross-Socket Access: Headers and payloads can reside on different sockets, eliminating the need for remote data access by applications.
2. Memory Permission Isolation
a. Memory Sharing and Safety: Each application creates memory pool and shares it with the userspace stack. Only read permission is retained in userspace stack after registration on device.
b. Fault Containment and Protection: In the event of memory exceptions in either the application or the userspace stack, their operational stability remain unaffected.
Through detailed design, we have enhanced the performance and safety. Attendees will get an in-depth look at the practical application.
Speakers
avatar for dapeng sang

dapeng sang

Senior Engineer, ByteDance
A kernel network engineer at ByteDance, currently focusing on user-space protocol stacks, kernel networking. We provide high-performance, cost-effective, and stable network services for data centers.
avatar for Wei Yan

Wei Yan

Senior Engineer, ByteDance
A software engineer at ByteDance, currently focusing on the performance and stability of user-space TCP protocol stack.
Tuesday May 12, 2026 10:15 - 10:25 CEST
Rum 17+18 - Floor 3
  Lightning Talks

12:05 CEST

Accelerate RSS Hash in Software With GFNI - Vladimir Medvedkin, Intel
Tuesday May 12, 2026 12:05 - 12:15 CEST
Overview of GFNI based Toeplitz hash implementation
Speakers
avatar for Vladimir Medvedkin

Vladimir Medvedkin

Software Engineer, Intel
Long time DPDK developer, maintainer of RIB, FIB, LPM, Hash and a few Intel PMDs.
Tuesday May 12, 2026 12:05 - 12:15 CEST
Rum 17+18 - Floor 3
  Lightning Talks
  • Audience Any
  • Presentation Slides Attached Yes

12:20 CEST

Low‑Latency Sensor Bridge Solution for Perception Physical AI (using DPDK) - Hemant Agrawal, NXP
Tuesday May 12, 2026 12:20 - 12:30 CEST
Physical AI systems demand ultra‑low‑latency transport of rich sensor data from the edge to centralized AI compute. This talk showcases a DPDK‑based sensor bridge using NXP i.MX processors as NVIDIA Holoscan Sensor Bridge endpoints, delivering deterministic, zero‑copy perception pipelines. It highlights how DPDK unlocks a new class of real‑time workloads for robotics, industrial vision, and Physical AI.
 

Speakers
avatar for Hemant Agrawal

Hemant Agrawal

Technical Director, NXP
NXP
Tuesday May 12, 2026 12:20 - 12:30 CEST
Rum 17+18 - Floor 3
  Lightning Talks
  • Audience Any
  • Presentation Slides Attached Yes

15:00 CEST

DPDK Powered Data Acquisition Systems at CERN - Roland Sipos, CERN
Tuesday May 12, 2026 15:00 - 15:30 CEST
At CERN, the European Organization for Nuclear Research, DPDK has evolved from a performance enabler to a common technology for data acquisition and readout systems across multiple practical use-cases. It is deployed in production in multiple experiments like NA62 and in the prototype detectors at CERN’s Neutrino Platform, and forms part of the architectural foundation for large-scale experiments like DUNE.
For NA62, DPDK replaced a commercial, licensed networking solution, enabling a fully open-source readout stack with improved maintainability and long-term sustainability.
In the DUNE experiment’s prototypes, the challenge was not only transitioning from custom protocols to standard Ethernet, but scaling to multi-100Gbps UDP inputs per computing node. This required NUMA-aware architecture, RX queue partitioning, multi-process separation of control and data planes, memory pool tuning, burst optimization, and careful interrupt and polling strategies to sustain deterministic throughput.
The talk presents concrete architectural patterns, tuning strategies, and operational lessons from large-scale, long-running deployments for physics experiments at CERN.
Speakers
avatar for Roland Sipos

Roland Sipos

Computing Engineer, CERN
I design and coordinate large-scale data acquisition and control systems, focusing on scalability, reliability, and maintainability. My work spans system architecture, technical direction, and cross-team alignment, while staying hands-on in development. I’m also active in R&D on... Read More →
Tuesday May 12, 2026 15:00 - 15:30 CEST
Rum 17+18 - Floor 3
  Session Presentations

16:00 CEST

Running a High-Performance DPDK-Based Router on Kubernetes - Andrea Panattoni, Red Hat
Tuesday May 12, 2026 16:00 - 16:30 CEST
Grout is a DPDK-based software router that supports IPv4/IPv6
forwarding, VRFs, NAT, and FRR integration. Deploying it, as any DPDK application, inside a Kubernetes pod presents a fundamental challenge: DPDK expects direct hardware access, hugepages, and dedicated CPU cores, while Kubernetes abstracts all of these away by design.

This talk walks through deploying Grout on Red Hat OpenShift, leveraging the platform's operator ecosystem to bridge the gap between DPDK's hardware requirements and Kubernetes' abstraction model. It covers the full stack: configuring the SR-IOV Network Operator to expose virtual functions, using the Node Tuning Operator and PerformanceProfiles to guarantee isolated CPUs, Hugepages, and NUMA-aligned scheduling, and packaging Grout as a container that can consume these resources.
Speakers
avatar for Andrea Panattoni

Andrea Panattoni

Software Engineer, Red Hat
Andrea Panattoni is a Principal Software Engineer at Red Hat, working on OpenShift Networking area. He
has been working on Telco-related OpenShift features and operators for the last few years.
Tuesday May 12, 2026 16:00 - 16:30 CEST
Rum 17+18 - Floor 3
  Session Presentations

16:35 CEST

Using DPDK on Embedded RISC-V Cores of a NIC - Dmitry Kozlyuk, Mitigator Global
Tuesday May 12, 2026 16:35 - 17:05 CEST
Data-path accelerator (DPA) is an NVIDIA BlueField-3 subsystem that consists of a large number of RISC-V cores integrated with the NIC fabric. DPA cannot comprehensively host DPDK, because DPA is running an RTOS without any conventional services except scheduling. Besides, DPDK core abstractions are suboptimal for DPA or have limited use there. On the other hand, it is desired to run advanced and well-tested DPDK algorithms on DPA. Doing so means running DPDK control plane and data plane code on separate HW and in very different environments. We describe the needed adjustments to DPDK libraries to do so and measure the performance of DPDK code running on DPA. We also outline and discuss the gaps that DPDK could overcome to allow its use in such heterogeneous environments.
Speakers
avatar for Dmitry Kozlyuk

Dmitry Kozlyuk

Principal SWE, Mitigator Global
I've been using DPDK for 10 years including 2+ years of active contribution. Windows support and memory management are my areas of expertise in DPDK. I'm also eager about teaching DPDK and have a lot of experience in anti-DDoS.
Tuesday May 12, 2026 16:35 - 17:05 CEST
Rum 17+18 - Floor 3
  Session Presentations
 
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